The IBM 1620 is a model of scientific minicomputer that was produced by IBM. It was announced on October 21, 1959, and was then marketed as an inexpensive scientific computer. After a total production of about two thousand machines, it was withdrawn on November 19, 1970. Modified versions of the 1620 were used as the CPU of the IBM 1710 and IBM 1720 Industrial Process Control Systems (making it the first digital computer considered reliable enough for real-time process control of factory equipment).
Being variable-word-length decimal, as opposed to fixed-word-length pure binary, made it an especially attractive first computer to learn on; hundreds of thousands of students had their first computer experience on the IBM 1620.
Core memory cycle times were 20 microseconds for the (earlier) Model I, 10 microseconds for the Model II (about a thousand times slower than typical computer main memory in 2006). The Model II was introduced in 1962.
Architecture Memory The IBM 1620 Model I was a variable word length, binary-coded decimal (BCD) computer using magnetic-core memory. The Model I core could hold 20,000 decimal digits with each digit stored in six bits."... arranged as a 100x100 array of 12-bit locations, each holding 2 decimal digits. (Each decimal digit was encoded in binary using 6 bits.)" More memory could be added with the IBM 1623 Storage Unit, Model 1 which held 40,000 digits, or the 1623 Model 2 which held 60,000.
The Model II deployed the IBM 1625 core-storage memory unit, whose memory cycle time was halved by using faster cores, compared to the Model I's (internal or 1623 memory unit): to 10 μs (i.e., the cycle speed was raised to 100 kHz).
While the five-digit addresses of either model could have addressed 100,000 decimal digits, no machine larger than 60,000 decimal digits was ever marketed.Although there are descriptions of a single 100,000-digit machine, designed in the late 1960s, using heavily modified hardware.
Memory access Memory was accessed two decimal digits at the same time (even-odd digit pair for numeric data or one alphameric character for text data). Each decimal digit was six bits, composed of an odd parity Check bit, a Flag bit, and four BCD bits for the value of the digit in the following format:"The main memory was logically arranged as 20,000 6-bit words. Each word comprised four BCD data bits, a "flag" bit, and an odd parity check bit. Though this was its logical arrangement, physically memory was a 100x100 array of 12-bit ferrite core words, which causes a few quirks in the instruction set. All instructions occupied 12 consecutive digits of memory, and were required to start at an even address so that the two-digit opcode could be read in one 12-bit physical word."
C F 8 4 2 1
The Flag bit had several uses:
In the least significant digit it was set to indicate a negative number (signed magnitude). It was set to mark the most significant digit of a number (word mark). In the least significant digit of five-digit addresses it was set for indirect addressing (an option on the Model I, standard on the 1620 Model II). Multi-level indirection could be used (the machine could even be put into an infinite indirect addressing loop). In the middle three digits of five-digit addresses (on the 1620 II) they were set to select one of seven index registers.
In addition to the valid BCD digit values there were three special digit values (these could be used in calculations):
C F 8 4 2 1 1 0 1 0 Record Mark (right most end of record, prints as a double dagger symbol, ‡) 1 1 0 0 Numeric Blank (blank for punched card output formatting) 1 1 1 1 Group Mark (right most end of a group of records for disk I/O)
Instructions were fixed length (12 decimal digits), consisting of a two-digit "op code", a five-digit "P Address" (usually the destination address), and a five-digit "Q Address" (usually the source address or the source immediate value). Some instructions, such as the B (branch) instruction, used only the P Address, and later smart assemblers included a "B7" instruction that generated a seven-digit branch instruction (op code, P address, and one extra digit because the next instruction had to start on an even-numbered digit).
Fixed-point data "words" could be any size from two decimal digits up to all of memory not used for other purposes.
Floating-point data "words" (using the hardware floating-point option) could be any size from 4 decimal digits up to 102 decimal digits (2 to 100 digits for the mantissa and two digits for the exponent).
The Fortran II compiler offered limited access to this flexibility via a "Source Program Control Card" preceding the Fortran source in a fixed format:
*ffkks
The * in column one, ff the number of digits for the mantissa of floating-point numbers (allowing 02 to 28), kk the number of digits for fixed-point numbers (allowing 04 to 10) and s is to specify the memory size of the computer to run the code if not the current computer: 2, 4, or 6 for memories of 20,000 or 40,000 or 60,000 digits.
The machine had no programmer-accessible registers: all operations were memory to memory (including the index registers of the 1620 II).
See Architectural difficulties section
Character and op codes
The table below lists Alphameric mode characters (and op codes).